Low voltage ride through enhancement for wind turbines equipped with DFIG under symmetrical grid faults

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dc.contributor.authorJusto, Jackson J
dc.contributor.authorMwasilu, Francis
dc.date.accessioned2019-02-04T05:19:41Z
dc.date.available2019-02-04T05:19:41Z
dc.date.issued2018-12-31
dc.description.abstractIn modern power systems with significant penetration of wind-turbines (WTs), improvement of low voltage ride through (LVRT) capability of WTs equipped with doubly-fed induction generators (DFIGs) is an important issue. Thus, this paper proposes a low voltage ride through (LVRT) strategy, which comprise of a capacitor connected in series with an inductor both connected in parallel to a resistor. The configuration is then connected to a small series resistor via a pair of antiparallel-Thyristors. The circuit and its switching control scheme of the proposed LVRT circuit are designed to: minimize the transition times, maintain the RSC connection to the rotor-windings, and reduce oscillations of dc-link voltage. In this case, the capacitor is entitled to eliminate ripples generated in the rotor voltage while the inductor reduces the ripple in rotor current. Different fault conditions were studied to validate the performance of the proposed scheme using MATLAB/Simulink platform. Comparative results and analysis are presented with conventional LVRT strategies.en_US
dc.description.sponsorshipN/Aen_US
dc.identifier.citation(Tanz. Journ. Engrg. Technolen_US
dc.identifier.issn2619-8789 (electronic)
dc.identifier.issn1821-536X (print)
dc.identifier.urihttp://hdl.handle.net/20.500.11810/5031
dc.language.isoenen_US
dc.publisherJournal of Engineering and Technology, TJETen_US
dc.relation.ispartofseries37;2
dc.subjectDoubly-Fed Induction Generator (DFIG), Fault Ride Through (FRT), Low Voltage Ride Through (LVRT), Rotor Side Converter (RSC), and Wind Turbines (WTs).en_US
dc.titleLow voltage ride through enhancement for wind turbines equipped with DFIG under symmetrical grid faultsen_US
dc.typeJournal Articleen_US
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